This document applies to components and assemblies that
contain Pb-free and Pb-containing solders and finishes.
This document describes the marking of components and the
labeling of their shipping containers to identify their 2na
level terminal finish or material, and applies to components
that are intended to be attached to boards or assemblies
with solder or mechanical clamping or are press fit. This
document also applies to 2nd level terminal materials for
bumped die that are used for direct board attach.
This document applies to boards/assemblies, to identify the
type of Pb-free or Pb-containing solder used. This document
documents a method for identifying board surface finishes
and Printed Circuit Board (PCB) resin systems. This docu-
ment applies to PCB base materials and for marking the
type of conformal coating utilized on Printed Circuit Board
Assemblies (PCBAs). Material and their containers previ-
ously marked or labeled according to JESD 97 or IPC-1066
need not be remarked unless agreed upon by the supplier
and customer.
Labeling of exterior surfaces of finished articles, such as
computers, printers, servers, and the like, is outside the
scope of this document. However internal PCBs and PCBAs
are covered by this document. Labeling of retail packages
containing electronic products is also outside the scope of
this document.